Notes with worthy tutorials
Tanmay Chakrabarty 
For a CPU to perform at its maximum potential, it needs rapid and continuous access to memory. However, high-speed memory is costly, which necessitates the use of various levels of memory that balance performance and cost. Here’s an overview of the different types of memories in a computer system and their organization in a multilevel memory hierarchy.
Von Neumann Architecture: In 1947, John Von Neumann developed an architecture of a new stored-programmed electronic computer which is also referred as the IAS computer as the Institute for Advanced Studies in Princeton. Key concepts of that design are as follows. Stored program concept. Data and instructions are stored in a single read-write memory. Arithmetic … Read more
Expanded Structure of Von Neumann Architecture The expanded structure of the Von Neumann Architecture or the IAS computer is given below, Legends of the above given figure are given below, MBR (Memory Buffer Register): MBR is a two-way register that holds the data fetched from memory and ready for the CPU to process or the data waiting … Read more
Working Principles of Intel 8086 Microprocessor Execution of instructions can be used to explain the working principles of the microprocessor. This is given below, The BIU outputs the contents of the instruction pointer register (IP) onto the address bus, causing the selected byte or word to be read into the BIU. Register IP is incremented by … Read more
Flag Registers of 8086 Processor: Intel 8086 has 16 flag registers among which 9 are active. The purposes of the FLAG registers are to indicate the various statuses of the processor. It is done by setting the individual bits called flags. There are two kinds of FLAGS; Status FLAG and Control FLAG. Status FLAG reflect … Read more
Code segment (CS) is a 16-bit register containing address of 64 KB segment with processor instructions. The processor uses CS segment for all accesses to instructions referenced by instruction pointer (IP) register. CS register cannot be changed directly. The CS register is automatically updated during far jump, far call and far return instructions.
In computer architecture, registers in processors are quickly accessible locations available to a computer’s central processing unit (CPU). Registers usually consist of a small amount of fast storage, although some registers have specific hardware functions, and may be read-only or write-only. Registers are normally measured by the number of bits they can hold, for example, an “8-bit register”, “32-bit register” or a “64-bit register” (or even with more bits).
Purpose of using Instruction Queue: BIU contains an instruction queue. When the EU executes instructions, the BIU gets up to 6 bytes of the next instruction and stores them in the instruction queue and this process is called instruction prefetch. This is a process to speed up the processor. A subtle advantage of instruction queue … Read more
If we study the internal architecture of 8086 microprocessor, we can see that it has two major units; Execution Unit (EU) and Bus Interface Unit (BIU). They are dependent and work with each other.
In the following given figure, which is a block diagram of 8086 microprocessor, it can be seen it is internally divided into two separate functional units. These are the Bus Interface Unit (BIU) and the Execution Unit (EU). These two functional units can work simultaneously to increase system speed and hence the throughput. Throughput is a measure of number of instructions executed per unit time.
Below is a short description of these two units.
The Intel 8086 is a 16-bit microprocessor designed by Intel corporation between 1976-1978. It is also called the iAPX 86. This Intel 8086 microprocessor gave rise to the x86 architecture or 16-bit architecture. Following figure is the internal architecture of Intel 8086 microprocessor