Last updated on August 28th, 2020 at 03:43 pm
Expanded Structure of Von Neumann Architecture
The expanded structure of the Von Neumann Architecture or the IAS computer is given below,
- MBR (Memory Buffer Register): MBR is a two-way register that holds the data fetched from memory and ready for the CPU to process or the data waiting to be stored in memory.
- MAR (Memory Address Register): MAR specifies the address in memory of the word to be written from or read into the MBR.
- IR (Instruction Register): IR contains the 8-bit op-code instruction being executed.
- IBR (Instruction Buffer Register): IBR is employed to hold temporarily the right-hand instructions from a word in memory.
- PC (Program Counter): PC is an counter that contains the address of the next instruction-pair to be fetched from memory to be executed.
- AC and MQ (Accumulator and Multiplier Quotient): AC and MQ are employed to hold temporarily operands and results of ALU operations.