What are CISC & RISC? What are differences between CISC and RISC?

The instruction set or the instruction set architecture (ISA) is the set of basic instructions that a processor understands. The instruction set is a portion of what makes up an architecture.

Read More: Define Instruction Set Architecture. What are the main objectives of ISA in computer systems.

Two initial types of instruction set architecture are CISC (Complex Instruction Set Computer) and RISC (Reduced Instruction Set Computer).

Complex Instruction Set Computer is a computer running on Complex Instruction Set Architecture. As it’s name implies, the ISA was built with multi-cycle complex instructions. That is one instruction might evaluate to multiple instructions.

For example, if MULT is an complex instruction which do multiplication, can have several other low level instructions executed with it. Such as,

1. Load the operands of the multiplication operation
2. Perform multiplication
3. Store the result

Complicated or specialized instructions are inefficient in hardware, and in a typically CISC architecture the best performance can be obtained by using only the most simple instructions from the ISA.

The most well known CISC ISAs are the Motorola 68k and Intel x86 architectures.

RISC or Reduced Instruction Set Computer is a computer running on Reduced Instruction Set Architecture. As it’s name implies, discarded many complex, multi-cycle, inefficient instructions from the set to make the ISA more efficient. As most programs do not take advantage of all the various address modes that could be used with the instructions, by reducing the number of address modes and breaking down multi-cycle instructions into multiple single-cycle instructions several advantages can be achived such as, compilers can be easier to write in an optimized fashion, performance can be increased for programs that do simple operations etc.

The most well known/commoditized RISC ISAs are the PowerPC, ARM, MIPS and SPARC architectures.

Differences Between RISC and CISC:

RISC and CISC both are suitable at its specific application. It mainly depends on the hardware that executes instructions which are given.

CISC		RISC
More importance on Hardware	1	More importance on software
Includes multi-cycle instructions	2	Only single-cycle instructions
Facilitates more cycles per second	3	Facilitates less cycles per second
Compilers can compile codes to executable faster	4	Compilers take longer time to compile codes
Requires relatively small code length	5	Longer code length is facilitated
Less RAM required	6	More RAM Required